1. Field of the Invention
The invention relates to analog-to-digital converters, and more particularly to testing of analog-to-digital converters.
2. Description of the Related Art
Analog-to-digital converters convert analog signals to digital signals. Because a digital signal processor can only receive a digital signal as an input, an analog-to-digital converter is often used to convert an analog signal to a digital signal for input of the digital signal processor. If the analog-to-digital signal is poor, errors are induced in the input signal of the digital signal processor, and performance of the digital signal processor is degraded. The evaluation of the performance of analog-to-digital converters is therefore important to weed out poor analog-to-digital converters.
Ordinarily, testing of analog-to-digital converters are performed during the manufacturing stage of the analog-to-digital converters. A testing apparatus is used to perform testing of analog-to-digital converters. Referring to FIG. 1, a block diagram of a testing apparatus 100 for testing an analog-to-digital converter 190 is shown. The analog-to-digital converter 190 receives an analog input signal and then converts the analog input signal to a plurality of bit signals bit0, bit1, . . . , and bit9. The testing apparatus 100 then receives the bit signals and then gives a performance value to the analog-to-digital converter 190 according to the bit signals. In one embodiment, the testing apparatus 100 comprises a decimal converter 110, a histogram generator 120, and a performance analyzer 130.
The decimal converter 110 converts the binary bit signals bit0, bit1, bit2, . . . , bit9 into a series of decimal values. The histogram generator 120 then generates a histogram according to the decimal values. The performance analyzer 130 then estimates an integral nonlinearity (INL) value and a differential nonlinearity (DNL) value according to the histogram to determine the performance of the analog-to-digital converter 190. FIG. 2A shows an analog input signal received by the analog-to-digital converter 190, and FIG. 2B shows a histogram generated by the histogram generator 120 according to the decimal values.
The testing apparatus 100 shown in FIG. 1, however, has a high manufacturing cost and a complicated circuit design. First, to store the decimal values generated by the decimal converter 110, the histogram generator 120 must comprise a memory with a large memory space which increases the hardware cost of the testing apparatus 100. In addition, the histogram generator 120 and the performance analyzer 130 need complicated circuits to implement complex calculations, and this increases the hardware cost of the testing apparatus 100. To reduce the hardware cost of the testing apparatus, a testing apparatus with a simplified circuit structure for testing an analog-to-digital converter is required.